системный программист

Synopsys provides technology for chip design, verification, and IP integration, enabling the creation of high-performance silicon chips and software content. The company drives innovations in the era of pervasive intelligence, supporting applications ranging from self-driving cars to machine learning.

• Lead the verification of complex ASIC blocks and systems to ensure they meet specifications and performance goals;
• Partner with design teams to define verification requirements;
• Build and maintain UVM testbenches and agents;
• Review and improve test plans and code;
• Apply SVA and formal verification techniques;
• Develop and execute comprehensive test plans to verify design functionality and performance;
• Implement and analyze coverage metrics;
• Utilize advanced EDA tools and methodologies to optimize design performance and power efficiency;
• Mentor and guide junior engineers;
• Stay up-to-date with the latest industry trends and technologies.

• 10+ Years of experience in ASIC/UVM verification;
• Extensive experience in ASIC digital design and verification;
• Proficiency in SystemVerilog, C, Python, TCL, and Perl;
• Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC designs;
• Proficiency in using industry-standard EDA tools and methodologies for verification;
• Strong analytical and problem-solving skills;
• Excellent communication and collaboration skills;
• Nice to have: Background in RTL design.

• Competitive salaries;
• Comprehensive medical and healthcare plans;
• ETO and FTO programs in addition to company holidays;
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance;
• ESPP with a 15% discount and 24-month look-back;
• Retirement plans.